Taiwan Semiconductor Manufacturing (TSMC) has provided insights into its capital expenditure (Capex) plans for 2024, aiming for a revenue range of $18 to $18.8 billion during the first quarter, representing a 6.2 percent sequential decline at the midpoint.
Having spent $30.4 billion in 2023, TSMC disclosed that its capital budget for 2024 is expected to range between $28 billion and $32 billion, with a strategic allocation of 70 to 80 percent for advanced process technologies, 10 to 20 percent for specialty technologies, and around 10 percent for advanced packaging, testing, mask making, and other initiatives.
Wendell Huang, TSMC’s Vice President and CFO, remarked during an analyst meeting, “With our 2024 Capex guidance of $28 billion to $32 billion, the rate of increase of our capital spending has begun to level off as we capture and harvest the growth.”
Despite facing challenges in 2023, TSMC remains confident about achieving its revenue growth target of 15 to 20 percent CAGR over the next several years in U.S. dollar terms. The company foresees the overall semiconductor market (excluding memory) growing by more than 10 percent year over year in 2024, with the foundry industry expected to witness approximately a 20 percent growth, a metric that TSMC believes it can outperform, supported by its technological leadership and broad customer base.
TSMC, known for its technological prowess, emphasized the significance of its 3-nanometer technology, asserting its position as the most advanced semiconductor technology in both power, performance, and transistor technology. The company reported a strong ramp-up in the second half of 2023, with N3 accounting for 6 percent of total wafer revenue that year.
Building on the success of N3, TSMC introduced N3E, which has already entered volume production in the fourth quarter of 2023. The company anticipates a significant surge in revenue from 3-nanometer technology, projecting it to more than triple in 2024, constituting a mid-teens percentage of total wafer revenue.
TSMC also provided insights into its future roadmap, highlighting the development of 2-nanometer technology (N2), which is set to be the most advanced semiconductor technology in terms of both density and energy efficiency when introduced in 2025. The company is on track for volume production in 2025, with a ramp profile similar to N3. Additionally, TSMC plans to introduce N2 with backside power rail solution in the second half of 2025.
Approximately 70 percent of TSMC’s total revenue currently comes from 16-nanometer and more advanced nodes, and the company expects this percentage to rise with contributions from 3-nanometer and 2-nanometer technologies in the coming years.
TSMC’s strategy for mature nodes involves collaborating with partners to develop specialty technology solutions, aiming to create long-lasting value for customers. The company forecasts that 28-nanometer will be the sweet spot for embedded memory applications in the future.
Expanding its global footprint, TSMC is actively engaged in building specialty technology fabs in various regions.
In Japan, a specialty technology fab in Kumamoto, utilizing 12-, 16-, 22-, and 28-nanometer process technologies, is set to commence volume production in the fourth quarter of 2024.
In Arizona, TSMC is making progress towards volume production of N4, or 4-nanometer process technology, in the first half of 2025.
In Europe, plans are underway to construct a specialty technology fab in Dresden, Germany, focusing on automotive and industrial applications, with construction scheduled to begin in Q4 2024.
In its home base of Taiwan, TSMC continues to invest and expand advanced technology capacities, including the expansion of 3-nanometer capacity in Tainan Science Park. The company is also gearing up for N2 volume production starting in 2025 and plans to build multiple fabs for 2-nanometer technologies in both Hsinchu and Kaohsiung science parks.
Baburajan Kizhakedath
