Sprint has launched C3PO (Clean CUPS Core for Packet Optimization), an NFV/SDN-based mobile core reference solution, to improve performance of the network core.
C3PO, a major part of the NFV and SDN strategy of Sprint, enables the wireless operator to adapt to market demands and scale new services more efficiently and cost-effectively.
Sprint, a SoftBank company, said C3PO provides a streamlined, high-performance data plane for the packet core.
“C3PO revolutionizes the network core and it is part of our expanded toolbox of solutions to meet the coming wave of data in the years ahead,” said Gunther Ottendorfer, chief operating officer – Technology, Sprint.
Sprint in a statement issued on Monday said that C3PO uses standard high-volume server hardware and streamlines mobile core architecture by collapsing multiple components into as few network nodes as possible.
Sprint achieved 1.63 Mpps (million packets per second) throughput in lab tests conducted on Dell EMC DSS 9000 rack scale infrastructure with compute sleds running dual socket 14 core Intel Xeon processors E5-2680 v4.
This C3PO configuration demonstrated high efficiency by utilizing as few as seven processor cores – with one packet processing core and six processor cores supporting other tasks such as Control Plane, statistics, load balancer, operating system and other operations, for 500,000 subscribers using a typical Sprint traffic model. A similar C3PO configuration achieved 2.2 Mpps with a similar traffic model for 50,000 subscribers.
Four years ago, Intel Labs and Sprint started a joint research to develop optimal DPDK-based data plane nodes and disaggregated evolved packet core architectures, as well as a platform for further 5G core infrastructure research.
“By combining Sprint’s operator knowledge with Intel’s research on optimizing software for standard high-volume servers, we’ve developed a single solution that provides seven functions previously located within separate physical elements,” said Ron Marquardt, vice president of Technology at Sprint.
C3PO addresses bottlenecks in mobile core packet performance by separating and independently scaling the data plane and control plane. The C3PO architecture collapses multiple evolved packet core and SGi LAN elements in a single data plane instance.
A serving gateway, packet gateway, deep packet inspection, child protection, carrier grade NAT, static firewall, and service function chaining, or any combination of these functions, can be collapsed into one data plane instance.
Intel Labs technologists built the next generation core control plane and data plane virtualized EPC applications, and Sprint developed the SDN controller enhancements. The EPC application code from Intel is available via the CORD project in ON.Lab, and the SDN plug-ins from Sprint are available via OpenDaylight.
