NetLogic Microsystems announced the launch of XLP II
family of multi-core processors, advanced communications multi-core processors
for next-generation LTE mobile infrastructure, data center, enterprise
networking, storage and security applications.
As an aggressive early adopter of the 28nm process
technology, the XLP II processor family deliver 5-7x performance enhancement
over the existing generation of XLP processors, which already set the gold
standard in multi-core processing today.
The XLP II processor family is designed to deliver over
100 Gigabits-per-second (Gbps) of network processing performance per device,
and over 800Gbps in a clustered, fully-coherent system, which is an
order-of-magnitude beyond anything currently available in the market.
As NetLogic Microsystems’ fourth-generation multi-core
processor family, the new XLP II multi-core processors integrate up to 80
high-performance NXCPUs per chip, featuring an enhanced quad-issue,
quad-threaded, superscalar out-of-order processor architecture capable of
operating at up to 2.5 GHz to provide unmatched control and data plane
processing and low-power profile.
These processor cores include advancements that
considerably improve pre-fetch performance, branch mis-predict penalties and
cache access latencies. The XLP II multi-core processor family also
significantly expands the tri-level cache architecture to over 32MB of fully
coherent on-chip cache which represents over 260MB of on-chip cache in the
maximum clustered configuration of 8 fully-coherent XLP II processors.
To further extend the performance and capabilities of the
XLP II processors, customers will be able to design systems using eight sockets
of XLP II processors to achieve an unprecedented scalability of up to 640
NXCPUs.
A second-generation high-speed Inter-chip Coherency
Interface (ICI) enables full processor and memory coherency across all 640
NXCPUs, making it seamless for software applications to run in Symmetric Multi
Processing (SMP) or Asymmetric Multi Processing (AMP) modes.
The scalability enables original equipment manufacturers
(OEMs) to develop highly scalable, highly differentiated equipment spanning
entry-level multi-Gigabit to high-end Terabit systems.
Building upon the performance leadership and strong design
win momentum of our industry-leading XLP processor family, we are pleased to
announce our revolutionary XLP II processor family featuring numerous
innovations that put us a full generation ahead of competing communications
multi-core solutions. We believe our highly differentiated XLP II processor is
a true game-changer that will give us a significant competitive advantage in
the communications infrastructure market,” said Ron Jankov, president and chief
executive officer at NetLogic Microsystems.
“NetLogic Microsystems
is moving aggressively to 28nm technology ahead of the competition. The XLP II
multi-core processor will deliver a sizeable leap in performance compared with
today’s popular XLP products,” said Linley Gwennap, principal analyst at The
Linley Group and editor-in-chief of the Microprocessor Report.
For the high-end of the XLP II family, to complement the
80 NXCPUs per chip, the XLP II multi-core processors include fully-autonomous
hardware processing engines to accelerate a variety of networking, security and
storage functions,
NetLogic Microsystems’ XLP II multi-core processor family
features a third-generation high-speed Fast Messaging Network that provides
higher-bandwidth, lower-latency communications among the 640 NXCPUs, and to
support hundreds of billions of in-flight messages and packet descriptors among
all the on-chip elements.
In addition to the Fast Messaging Network, the XLP II
processors integrate a very advanced on-chip interconnect for the memory
sub-system as well as a wide range of high-speed physical-layer and
logical-layer networking interfaces.
The XLP II multi-core processor family offers a tri-level
cache architecture with over 32MB of fully coherent on-chip cache and
integrates four channels of DDR3 memory controllers that yield over 545Gbps of
off-chip memory bandwidth. In the maximum clustered configuration of 8
fully-coherent XLP II chips, this represents over 260MB of on-chip cache and up
to 32 DDR3 memory ports yielding 4.4Tbps of DRAM access.
To enable customers to take full advantage of all these
performance advancements while meeting tight power budgets, the XLP II
processor family also incorporates very sophisticated power management
technology and innovations that deliver best-in-class power/performance ratio
that in turn helps system vendors develop energy-efficient networking and
communications equipment.
The first members of the XLP II processor family will be
available in the first quarter of 2012, with additional members expected to
sample in the first half of 2012.
Recently, NetLogic Microsystems announced that ZTE, a
provider of telecom equipment and network solutions, has selected
NetLogic Microsystems’ NLA11k knowledge-based processors, optimized for
Internet Protocol Version 6 (IPv6) processing, for ZTE’s multi-terabit T8000
Cluster Router.
ZTE’s T8000 Router is ideal for operators and service
providers building sophisticated IP/Multiprotocol Label Switching (MPLS)
infrastructure for next-generation network backbones.
By Telecomlead.com Team
editor@telecomlead.com
